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samsung t f t -lcd doc. no : is005 1 prepared by : amlcd division lcd r&d team 2 issue date : 00-01-06 model : LTM213U3 interface specification (for engineering sample) note : this specification is available only for engineering samples. without prior notice, all of data and terms would be changed or re-arranged. samsung electronics co., ltd. www..net www..net
samsung t f t -lcd doc. no : is005 2 general description descriptio n LTM213U3 is a tft-lcd monitor capable of displaying a very high resolution image, which can produce a 16.7m colors simultaneously . this product can receive lvds input signal through jae 31pin connector and 5v power through molex 12 pin connector respectively. it shows a high brightness screen as 200 cd /m 2 min. features (1) general specifications screen size : 21.3" diagonal active area dimension : 432.0(h) ?? 324.0(v) [mm 2 ] resolution : uxga(1600x1200xrgb) pixel pitch : 0.270x0.270 [mm 2 ] pixel arrangement : vertical stripe no. of display color : 16.7m colors(8-bit per color) power consumption : 60 [w] max. ( including b/l & inverter ) outline dimension : 483.0(h)x373.2(v)x28.0(t) max. weight : 5 kg (2) electrical specifications data format : 2ch openldi (lvds), 2pixel/clock sync mode : de mode only operating supply voltage : 5v only connector : jae fi-we31p-hf(for data and sync) molex 53261(for power) (3) optical specifications brightness : 200 cd /m 2 , min. contrast ratio : 200 typ . viewing angle : 160 ?? horizontal, 160 ?? vertical, typ . crosstalk : under 5% response time : 70 [ms] max. (4) miscellaneous mtbf : 20,000 hrs edge light ccfl 6-lamps incorporated applications engineering workstation(ews) high performance pc desk top publishing system www..net www..net
samsung t f t -lcd doc. no : is005 3 1. block diagram lvds ds90c388 lcd drive analog circuit timing contriller data driver gate driver data & control signal power lvds signals tft lcd power control power inverter signal connect power connect power & gamma control signal tft - lcd lamp 6ea www..net www..net
samsung t f t -lcd doc. no : is005 4 2.1. module signal input connect pin assignment - connector : jae f1-we31p-hf ( matching socket : jae f1-we31s-hf) 3 8 7 no. tx signal jae31p no. 3 8 8 no. rx signal remark 3 1 ( reserved) reserved 3 0 ( reserved) reserved 2 9 ( reserved) reserved 2 8 ( reserved) reserved 2 7 ( reserved) reserved 2 8 txout7+ 2 6 7 9 rxout7+ twisted pair 2 9 txout7- 2 5 8 0 rxout7- 2 4 ( gnd) twisted pair 2 3 ( gnd) 3 1 txout6+ 2 2 8 2 rxout6+ twisted pair 3 2 txout6- 2 1 8 3 rxout6- 3 3 txout5+ 2 0 8 4 rxout5+ twisted pair 3 4 txout5- 1 9 8 5 rxout5- 3 6 txout4+ 1 8 8 6 rxout4+ twisted pair 3 7 txout4- 1 7 8 7 rxout4- 1 6 ( gnd) twisted pair 1 5 ( gnd) 3 8 txout3+ 1 4 8 9 rxout3+ twisted pair 3 9 txout3- 1 3 9 0 rxout3- 4 1 txoutclk+ 1 2 9 1 rxoutclk+ twisted pair 4 2 txoutclk- 1 1 9 2 rxoutclk- 1 0 ( gnd) twisted pair 9 ( gnd) 4 4 txout2+ 8 9 4 rxout2+ twisted pair 4 5 txout2- 7 9 5 rxout2- 4 6 txout1+ 6 9 6 rxout1+ twisted pair 4 7 txout1- 5 9 7 rxout1- 4 9 txout0+ 4 9 8 rxout0+ twisted pair 5 0 txout0- 3 9 9 rxout0- 2 ( gnd) twisted pair 1 ( gnd) www..net www..net
samsung t f t -lcd doc. no : is005 5 vga-tft data signals color bits transmitter input ( pin no.) receiver output ( pin no.) tft panel signals 4 8 bit ds90c387 ds90c388 4 8 bit lsb ro0 r10 ( 1 0 ) r10 ( 8 ) ro0 ro1 r11 ( 9 ) r11 ( 9 ) ro1 ro2 r12 ( 8 ) r12 ( 1 0 ) ro2 ro3 r13 ( 7 ) r13 ( 1 1 ) ro3 ro4 r14 ( 6 ) r14 ( 1 2 ) ro4 ro5 r15 ( 5 ) r15 ( 1 4 ) ro5 ro6 r16 ( 4 ) r16 ( 1 5 ) ro6 msb ro7 r17 ( 3 ) r17 ( 1 7 ) ro7 lsb go0 g10 ( 2 ) g10 ( 1 8 ) go0 go1 g11 ( 1 ) g11 ( 1 9 ) go1 go2 g12 ( 1 0 0 ) g12 ( 2 0 ) go2 go3 g13 ( 9 9 ) g13 ( 2 1 ) go3 go4 g14 ( 9 6 ) g14 ( 2 2 ) go4 go5 g15 ( 9 5 ) g15 ( 2 4 ) go5 go6 g16 ( 9 4 ) g16 ( 2 6 ) go6 msb go7 g17 ( 9 3 ) g17 ( 2 7 ) go7 lsb bo0 b10 ( 9 2 ) b10 ( 2 8 ) bo0 bo1 b11 ( 9 1 ) b11 ( 2 9 ) bo1 bo2 b12 ( 9 0 ) b12 ( 3 0 ) bo2 bo3 b13 ( 8 9 ) b13 ( 3 1 ) bo3 bo4 b14 ( 8 8 ) b14 ( 3 2 ) bo4 bo5 b15 ( 8 7 ) b15 ( 3 4 ) bo5 bo6 b16 ( 8 6 ) b16 ( 3 6 ) bo6 msb bo7 b17 ( 8 5 ) b17 ( 3 7 ) bo7 lsb re0 r20 ( 8 4 ) r20 ( 3 8 ) re0 re1 r21 ( 8 1 ) r21 ( 3 9 ) re1 re2 r22 ( 8 0 ) r22 ( 4 0 ) re2 re3 r23 ( 7 9 ) r23 ( 4 1 ) re3 re4 r24 ( 7 8 ) r24 ( 4 3 ) re4 re5 r25 ( 7 7 ) r25 ( 4 6 ) re5 re6 r26 ( 7 6 ) r26 ( 4 7 ) re6 msb re7 r27 ( 7 5 ) r27 ( 4 8 ) re7 2.1.1 open ldi interface( data mapping:387/388) www..net www..net
samsung t f t -lcd doc. no : is005 6 vga-tft data signals color bits transmitter input ( pin no.) receiver output ( pin no.) tft panel signals 4 8 bit ds90c387 ds90c388 4 8 bit lsb ge0 g20 ( 7 4 ) g20 ( 4 9 ) ge0 ge1 g21 ( 7 3 ) g21 ( 5 0 ) ge1 ge2 g22 ( 7 2 ) g22 ( 5 1 ) ge2 ge3 g23 ( 7 1 ) g23 ( 5 2 ) ge3 ge4 g24 ( 7 0 ) g24 ( 5 3 ) ge4 ge5 g25 ( 6 9 ) g25 ( 5 5 ) ge5 ge6 g26 ( 6 6 ) g26 ( 5 7 ) ge6 msb ge7 g27 ( 6 5 ) g27 ( 5 8 ) ge7 lsb be0 b20 ( 6 4 ) b20 ( 5 9 ) be0 be1 b21 ( 6 3 ) b21 ( 6 0 ) be1 be2 b22 ( 6 2 ) b22 ( 6 1 ) be2 be3 b23 ( 6 1 ) b23 ( 6 2 ) be3 be4 b24 ( 6 0 ) b24 ( 6 4 ) be4 be5 b25 ( 5 9 ) b25 ( 6 5 ) be5 be6 b26 ( 5 8 ) b26 ( 6 7 ) be6 msb be7 b27 ( 5 7 ) b27 ( 6 8 ) be7 * note: LTM213U3 input application data mapping (r_fde, dual: vcc , r_fb, bal:gnd) 1 go1 2 1 r_fde 4 1 clk+ 6 1 be3 8 1 re1 2 go0 2 2 npd 4 2 clk- 6 2 be2 8 2 vcc 3 ro7 2 3 dual 4 3 lgnd 6 3 be1 8 3 gnd 4 ro6 2 4 bal 4 4 tx2+ 6 4 be0 8 4 re0 5 ro5 2 5 lgnd 4 5 tx2- 6 5 ge7 8 5 bo7 6 ro4 2 6 ck2+ 4 6 tx1+ 6 6 ge6 8 6 bo6 7 ro3 2 7 ck2- 4 7 tx1- 6 7 vcc 8 7 bo5 8 ro2 2 8 tx7+ 4 8 lvcc 6 8 gnd 8 8 bo4 9 ro1 2 9 tx7- 4 9 tx0+ 6 9 ge5 8 9 bo3 1 0 ro0 3 0 lvcc 5 0 tx0- 7 0 ge4 9 0 bo2 1 1 clk 3 1 tx6+ 5 1 lgnd 7 1 ge3 9 1 bo1 1 2 pvcc 3 2 tx6- 5 2 gnd 7 2 ge2 9 2 bo0 1 3 gnd 3 3 tx5+ 5 3 vcc 7 3 ge1 9 3 go7 1 4 pre 3 4 tx5- 5 4 hsync 7 4 ge0 9 4 go6 1 5 psel 3 5 lgnd 5 5 vsync 7 5 re7 9 5 go5 1 6 pgnd 3 6 tx4+ 5 6 de 7 6 re6 9 6 go4 1 7 pgnd 3 7 tx4- 5 7 be7 7 7 re5 9 7 vcc 1 8 pvcc 3 8 tx3+ 5 8 be6 7 8 re4 9 8 gnd 1 9 pgnd 3 9 tx3- 5 9 be5 7 9 re3 9 9 go3 2 0 r_fb 4 0 lvcc 6 0 be4 8 0 re2 1 0 0 go2 lvds 3 8 7 ( transmmiter) pin assign 1 pgnd 2 1 go3 4 1 re3 6 1 be2 8 1 lvcc 2 pvcc 2 2 go4 4 2 clk 6 2 be3 8 2 rx6+ 3 pgnd 2 3 vcc 4 3 re4 6 3 gnd 8 3 rx6- 4 deskew 2 4 go5 4 4 gnd 6 4 be4 8 4 rx5+ 5 psel 2 5 gnd 4 5 vcc 6 5 be5 8 5 rx5- 6 bal 2 6 go6 4 6 re5 6 6 vcc 8 6 rx4+ 7 gnd 2 7 go7 4 7 re6 6 7 be6 8 7 rx4- 8 ro0 2 8 bo0 4 8 re7 6 8 be7 8 8 lgnd 9 ro1 2 9 bo1 4 9 ge0 6 9 de 8 9 rx3+ 1 0 ro2 3 0 bo2 5 0 ge1 7 0 vsync 9 0 rx3- 1 1 ro3 3 1 bo3 5 1 ge2 7 1 hsync 9 1 clk+ 1 2 ro4 3 2 bo4 5 2 ge3 7 2 gnd 9 2 clk- 1 3 vcc 3 3 vcc 5 3 ge4 7 3 nc 9 3 lvcc 1 4 ro5 3 4 bo5 5 4 gnd 7 4 nc 9 4 rx2+ 1 5 ro6 3 5 gnd 5 5 ge5 7 5 nc 9 5 rx2- 1 6 gnd 3 6 bo6 5 6 vcc 7 6 lgnd 9 6 rx1+ 1 7 ro7 3 7 bo7 5 7 ge6 7 7 r_fde 9 7 rx1- 1 8 go0 3 8 re0 5 8 ge7 7 8 npd 9 8 rx0+ 1 9 go1 3 9 re1 5 9 be0 7 9 rx7+ 9 9 rx0- 2 0 go2 4 0 re2 6 0 be1 8 0 rx7- 1 0 0 lgnd lvds 3 8 8 ( receiver) pin assign jae 3 1 p con. www..net www..net
samsung t f t -lcd doc. no : is005 7 2.2. module power input connect pin assignment - power input (+5.0 v) - connector : molex 53261-1290 (matching socket : molex 51021-1200 ) 2.3. lamp input connect pin assignment - engineering only 1 2 3 nc cold hot 1 2 3 4 1 2 3 nc cold hot nc cold hot nc cn3-1 cn3-2 cn3-3 1 2 3 nc cold hot 1 2 3 4 1 2 3 nc cold hot nc cold hot nc cn4-1 cn4-2 cn4-3 lamp inverter pin no symbol power supply +5v 1 2 3 4 5 6 7 8 9 10 11 12 function power ground +5 v gnd www..net www..net
samsung t f t -lcd doc. no : is005 8 3. absolute maximum rating 3.1 voltage/current absolute rating module 5v min typ max 4.5 v 5.0 v 5.5 v power black mosaic white 1 a 2 a 2.5 a voltage power voltage b/l 12v 10.8 v 12.0 v 13.2 v 3.5 a 4 a 4.5 a vdd =5.0v vbl =12.0v 3.2 lamp voltage absolute rating - tbd www..net www..net
samsung t f t -lcd doc. no : is005 9 [ horizontal timing ] 4. timing diagram (de mode) de tv tv b data tv d l1 l2 l119 9 l120 0 th b t h mclk t c data1 de th d d1 d3 d5 data2 d2 d4 d6 d1599 d1600 d1597 d1598 d1595 d1596 timing table name symbol min. ( reduced blanking) typ. ( vesa standard) max unit clock frequency 1 / t c 6 2 8 1 9 0 mhz horizontal total time th 8 6 0 1 0 8 0 clock active data th d - 8 0 0 - clock blanking th b 6 0 2 8 0 clock vertical total time tv 1 2 0 5 1 2 5 0 line active data tv d - 1 2 0 0 - line blanking tv b 5 5 0 line [ vertical timing ] www..net www..net
samsung t f t -lcd doc. no : is005 10 5.2 rear view 5. outline demension 5.1 front view www..net www..net
samsung t f t -lcd doc. no : is005 11 pin no symbol power supply +12v 1 2 3 4 5 6 function +12 v b/l brightness control 0v: max 5v:min pin no symbol 1 2 3 4 5 6 7 8 9 10 11 12 function power ground gnd gnd brt control gnd on/off gnd +5 v gnd nc nc nc gnd ccfl driver signal ( active high ) logic power 5v power ground power ground power ground power ground no connection no connection no connection power ground #. inverter power input connect pin assignment - power input (cn1, +12.0 v) - connector : molex 53261-0690 ( matching socket : molex 51021-0600 ) ##. inverter signal input connect pin assignment - connector : molex 53261-1290 (matching socket : molex 51021-1200 ) www..net www..net

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